Semiconductor jobs in India
Real openings for freshers and experienced engineers. Every button opens the original job post.
Engineer – Firmware Design
Write and test firmware for embedded products. Freshers with microcontroller projects can apply.
ASIC Engineer Intern, Design Verification
A 12–16 week internship verifying chip designs for data-centre accelerators. Only for students still in a degree programme.
Physical Design Engineer (Trained Intern)
Work on the RTL-to-GDSII flow: floorplan, placement, CTS, routing and DRC/LVS. Good if you have done an OpenLane project. Note: the posting says unpaid.
Associate Design Support Engineer
Trainee role checking electronic parts, BOMs and wiring documents for defence and industrial products.
Technical Trainee – Embedded / VLSI
Help senior trainers teach embedded and VLSI lab classes. A way to stay close to VLSI tools while you keep applying.
Senior IP DV Engineer – NOC IP
Verify memory-subsystem and network-on-chip IP for GPUs and SoCs.
Physical Design Automation Engineer (Tech Lead)
Build and support RTL-to-GDS flows on Intel's newest process nodes.
Senior DV Engineer – PCIe
PCIe verification at IP, subsystem and SoC level. Immediate joiners only. Pay listed: ₹5–40 lakh a year.
Design Verification Engineer – PCIe
End-to-end PCIe verification, including planning, testbenches and coverage closure. Pay listed: ₹12–45 lakh a year.
Engineer / Senior Engineer (Verification)
Build full reference systems around Arm CPUs and debug across hardware and low-level software.
Digital Design Engineer
Design digital parts of mixed-signal IP like ADCs, DACs and PLLs for automotive and industrial chips.
Physical Design Engineer
Take RTL to tape-out for mixed-signal audio chips, from synthesis to signoff.
Stay safe: real companies never ask you to pay money to get a job. Jobs close fast; if a link no longer works, the job has likely been filled.
Tips for freshers
- Fresher chip jobs are fewer than senior ones. Apply early, and also look at internships, trainee and support roles to get in.
- Put one strong project on your resume: an RTL design with a testbench, or an OpenLane flow to GDSII.
- Read the experience line before applying. "0–1 yr" or "freshers eligible" means you can apply.